The computing industry has reached a significant milestone with the ratification of the 1.0 RISC-V Vector Specification. This development marks the beginning of a new era in computing efficiency, as ...

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...

The 2024 RISC-V Summit North America marked a significant milestone for the RISC-V community with the ratification of the RVA23 Profile. This event signifies a major step forward in the evolution of ...

RISC-V chip designer SiFive is introducing two new processors that the company says are designed for high-performance, energy-efficient applications such as wearables, smart home devices, virtual ...

RISC-V vendors are beginning to aim much higher in the compute hierarchy, targeting data centers and supercomputers rather than just simple embedded applications on the edge. In the past, this would ...

For those not immediately familiar with RISC-V, it is a relatively new CPU architecture which takes advantage of Reduced Instruction Set Computer (RISC) principles. RISC-V is an open standard ...

RISC-V cores are beginning to show up in heterogeneous SoCs and packages, shifting from one-off standalone designs toward mainstream applications where they are used for everything from accelerators ...

Forbes contributors publish independent expert analyses and insights. Dave Altavilla is a Tech Analyst covering chips, compute and AI. For decades, chip architectures have been dominated by a pair of ...

RISC-V is used to design anything from smartphone chips to advanced processors for AI Chinese chip design firms have embraced it Beijing has yet to mention it in policy Shares in Chinese chip firms ...

Old-timers might recall the idea of "RISC" as a once-upon-a-time processor design ideology. RISC processors were mostly used for servers from Sun Microsystems, DEC, and other companies of a bygone era ...

Many have waited years to hear someone like Prahlad Venkatapuram, Senior Director of Engineering at Meta, say what came out this week at the RISC-V Summit: “We’ve identified that RISC-V is the way to ...