To overcome 45-nm process challenges, semiconductor intellectual property (IP) providers and foundries are collaborating to provide designers with a combination of design resources and manufacturing ...

DesignWare Interface IP for the most widely used protocols delivers the required high bandwidth and low latency for efficient data connectivity in compute-intensive designs on TSMC N4P process ...

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the immediate availability of a complete, silicon-proven Cadence ® IP supporting the DDR5 and LPDDR5 DRAM ...

Long-reach, high-performance PCIe 5.0 IP with ultra-low power consumption targets hyperscale computing, networking and storage applications SAN JOSE, Calif.--(BUSINESS WIRE)-- Cadence Design Systems, ...

Creating reusable and portable analog intellectual property (IP) is a key trend to watch in EDA for 2009 and beyond. Finding a way to develop reusable analog IP will allow designers to build ...

A new 12-bit analog-to-digital converter (ADC) IP claims to have a unique value proposition: it’s process agnostic. You can generate transistor-level schematics, pick the process for specific needs, ...

Synopsys and Globalfoundries (GF) have announced a collaboration to develop a portfolio of automotive Grade 1 temperature (−40 to +150°C junction) DesignWare Foundation, Analog, and Interface IP for ...

Process maintenance teams have long been challenged with gaining access and connectivity to service their field-level devices. Traditionally, plant personnel needed to walk out to the processing area ...