IEEE

Pipelined Implementation of Secure Hash Algorithm on FPGA for Enhanced Performance

Abstract: This paper presents the implementation and opti-mization of the SHA-256 algorithm on an FPGA platform, specif-ically on the Xilinx Artix-4 DDR board. The main objective is to enhance the ...
IEEE

Comparative Analysis of A* and Dijkstra's Algorithms for Efficient Non-Planar 3D Printing ...

This paper presents a comparative analysis of Di-jkstra's algorithm with multi-source A* algorithm for optimizing non-planar 3D printing toolpath on tetrahedral meshes. It implements the multi-source ...